The present disclosure relates to a wiring substrate and a method for manufacturing a wiring substrate.
A semiconductor element may be, for example, flip-chip-mounted on a circuit substrate. A circuit substrate includes electrodes (pads) and a resist layer. The electrodes are exposed through openings formed in the resist film. Solder bumps are formed on the exposed electrodes. The solder bumps connect the circuit substrate to a semiconductor element. A further circuit substrate includes bumps exposed through openings in a resist layer. Plating is applied to each bump for connection with an electrode. The bumps connect the circuit substrate to a semiconductor element (refer to Japanese Laid-Open Patent Publication No. 2007-103878).
The integration of semiconductor elements has increased the number of terminals (pins) connecting the semiconductor elements to the wiring substrate, while narrowing the connection terminal pitch of the semiconductor elements. Thus, there is a need for a wiring substrate that is applicable to such semiconductor elements.